[SemiDrive G9X][PTG5.0]: SemiDrive G9X Safety Panic Tracking Tool (Basics)

1. Introduction

When the Safety system encounters a panic, developers need to trace and analyze the root cause of the issue. A safety panic tracing tool can help developers quickly locate the problem and perform troubleshooting and debugging.

This article mainly discusses the basic knowledge of Safety panic and the implementation of a tracing tool that can track the function call stack during a panic. By analyzing the stack, developers can trace and locate the flow of code execution that caused the deadlock.

2. CPU Operating States of Arm Processors

The instruction length of Arm microprocessors is 32 bits, but it can also be 16 bits (in Thumb state). Arm microprocessors support three data types: byte (8 bits), halfword (16 bits), and word (32 bits). Words require 4-byte alignment, and halfwords require 2-byte alignment. The CPU operating states of the Arm architecture are as follows:

1. ARM State: The processor executes 32-bit word-aligned ARM instructions.

In ARM state, the processor can access 32-bit data and address spaces simultaneously, providing high-performance computation and storage capabilities. ARM state instructions are 32 bits long and can execute any 32-bit instruction, offering better code efficiency and execution speed.

In ARM state, the processor can execute the following types of instructions:

(1) Data processing instructions: such as addition, subtraction, multiplication, division, and logical operations;

(2) Branch instructions: such as B, BL, and BX, used for jumps and subroutine calls;

(3) Memory access instructions: such as LDR, STR, LDM, and STM, used for reading and writing data and memory;

(4) Other instructions: such as exception handling instructions and coprocessor access instructions.

The ARM instruction set is efficient and flexible, meeting the needs of most embedded applications. However, due to the longer instruction length, it consumes more storage space and puts some pressure on the memory system, leading to increased power consumption.

Advantages:

Performance: Due to the richer instruction set, ARM state instructions typically execute more efficiently, making them suitable for high-performance computing scenarios.

Functionality: Supports more registers and more complex instructions, suitable for complex mathematical operations and data processing.

Applicable Scenarios:

High-performance applications: such as graphics processing, video encoding/decoding, and scientific computing.

Operating system kernels: scenarios requiring frequent context switching and system calls.

Embedded systems: embedded applications requiring complex task handling.

2. Thumb State: The processor executes 16-bit halfword-aligned Thumb instructions.

Thumb state supports a 16-bit instruction set, offering higher code density and lower power consumption. In Thumb state, instructions are 16 bits long, requiring two instructions to access 32-bit data and address spaces. However, this results in smaller program code size, saving memory space and improving cache utilization.

The Thumb instruction set is designed to optimize code density and power efficiency, making it suitable for embedded systems with specific requirements for code size and power consumption. In Thumb state, the processor can execute two types of instructions: Thumb-1 and Thumb-2.

Thumb-1 instructions are 16-bit and provide basic data processing and flow control operations, including arithmetic operations, logical operations, conditional branching, and jumps. Thumb-2 instructions, on the other hand, are 32-bit and can perform advanced data processing and memory access operations. They also support more complex program control structures, such as loops and function calls. Additionally, Thumb-2 instructions can utilize more powerful 32-bit data registers, improving data processing performance.

Advantages:

Code density: Due to shorter instructions, Thumb state code typically occupies less memory, making it suitable for devices with limited memory.

Power consumption: Smaller code size and higher instruction density usually result in lower power consumption, making it ideal for battery-powered devices.

Applicable Scenarios:

Resource-constrained embedded systems: such as sensors and microcontrollers with limited memory and storage space.

Low-power applications: such as portable devices and IoT devices requiring energy efficiency while maintaining performance.

Simple control logic: such as state machines and control algorithms.

In summary, the fundamental difference between ARM and Thumb states lies in the instruction width: ARM uses 32-bit instructions, while Thumb uses 16-bit instructions. Thumb-2 is a combination and optimization of ARM and Thumb states.

The Bx Rn instruction is used to switch between the two states. Bx is a branch instruction, and Rn is a register (1 word, 32 bits). If the least significant bit (LSB) of Rn is 1, the processor switches to Thumb state; if the LSB is 0, it switches to ARM state. (Reason: The last two bits of ARM instructions are always 0 and unused, while the last bit of Thumb instructions is always 0 and unused. Therefore, the LSB is used as the flag for switching between ARM and Thumb instructions.)

3. Switching between ARM and Thumb states does not affect the processor's operating mode or the contents of its registers.

4. When handling exceptions, the ARM processor always switches to ARM state, regardless of its current state.

3. CPU Operating Modes of Arm Processors

The CPU operating modes of the Arm architecture include seven modes: